iflash2_mtd - memory technology driver for Intel Series 2 flash

insmod iflash2_mtd.o [pc_debug=c n] [mem_speed=c n] [word_width=c n] [vpp_timeout_period=c n] [vpp_settle=c n] [erase_timeout=c n] [erase_limit=c n] [retry_limit=c n] [max_tries=c n] [mem_speed=c n] [word_width=c n]

Iflash2_mtd is a memory technology driver for Intel Series 2 and Series 100 flash devices. Memory technology drivers are used by Card Services to provide device-independent access for memory cards through bulk memory services.

Writing to Series 2 and Series 100 flash devices is very processor intensive. Individual words are written one at a time, at a speed of roughly 10 us per word. This busy period is too short to schedule other processes to run, so the driver will not yield the processor until an entire block is written.

pc_debug=n

Selects the PCMCIA debugging level. This parameter is only available if the module is compiled with debugging enabled. A non-zero value enables debugging.

mem_speed=n

Sets the access speed of shared memory windows, in nanoseconds. The default is 0 (i.e., no extra wait states). Values of up to 1000 are legal.

word_width=n

A flag indicating if memory windows should be configured for 8-bit (if 0) or 16-bit (if 1) transfers. The default is 1 (16-bit).

vpp_timeout_period=n

In milliseconds, this specifies the maximum idle period after a write operation before programming power will be switched off. The default is 1000 ms.

vpp_settle=n

In milliseconds, this gives a delay between when programming power is switched on, and when the device is assumed to be powered up and ready to receive erase or write commands. The default is 100 ms.

erase_timeout=n

In milliseconds, specifies the poll interval for monitoring the status of a bulk erase operation. The default is 100 ms.

erase_limit=n

In milliseconds, specifies the maximum elapsed time before an erase operation is assumed to have failed. The default is 10000 ms.

retry_limit=n

The maximum number of retries for a write operation. The default is 4.

max_tries=n

The maximum number of status register polls before a single word write is assumed to have timed out. The default is 4096.

David Hinds - dahinds@users.sourceforge.net

iflash2+_mtd(4), memory_cs(4).